stochastic_processor.h

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00001 //    sampalib.org ESL library and tools
00002 //    Copyright (C) 2007  Thierry Grellier
00003 //
00004 //    This program is free software; you can redistribute it and/or modify
00005 //    it under the terms of the GNU General Public License version 2 as
00006 //    published by the Free Software Foundation.
00007 //
00008 //    This program is distributed in the hope that it will be useful,
00009 //    but WITHOUT ANY WARRANTY; without even the implied warranty of
00010 //    MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
00011 //    GNU General Public License for more details.
00012 //
00013 //    You should have received a copy of the GNU General Public License along
00014 //    with this program; if not, write to the Free Software Foundation, Inc.,
00015 //    51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.
00016 //
00017 //    contact: www.sampalib.org
00018 
00019 #ifndef SAMPA_COMPONENT_STOCHASTIC_PROCESSOR_H
00020 #define SAMPA_COMPONENT_STOCHASTIC_PROCESSOR_H
00021 
00022 #include "sampa/component/protocol.h"
00023 
00024 namespace Sampa {
00025 
00026   class StochasticCpu : public Module {
00027     SAMPA_MODULE(StochasticCpu);
00028   public:
00029     StochasticCpu(const Name& name);  
00030     
00031     void bind_clock(Clock* clock);
00032     void bind_fetch_target(Target* target);
00033     Initiator* get_fetch_initiator() { return &p_fetch; } 
00034 
00035     void bind_data_target(Target* target);
00036     Initiator* get_data_initiator() { return &p_data; } 
00037    
00038     bool recieve_fetch_response(const Response&);
00039     bool recieve_data_response(const Response&);
00040    
00041     typedef AdaptingInitiator<StochasticCpu> AdaptingInitiator;
00042     enum Opcode { NOP, STALL, BRANCH, READ, WRITE, READ_MISS, WRITE_MISS, MISPREDICTED };
00043   private: 
00044     enum State {
00045       EXECUTE,
00046       READ_FETCH_STALL,
00047       READ_STALL,
00048       WRITE_FETCH_STALL,
00049       WRITE_STALL,
00050       BRANCH_FETCH_STALL,
00051       BRANCH_STALL,
00052       FETCH_STALL,
00053       FETCHED,
00054     };
00055    
00056     void   complete_restart();
00057     bool   fetch_hit(const Address&);
00058     Opcode decode();
00059     void   fetch();  
00060     void   execute();  
00061     void   request_data();  
00062     bool   read_hit();
00063     bool   write_hit();
00064     bool   eviction();
00065 
00066     AdaptingInitiator        p_fetch;
00067     AdaptingInitiator        p_data;
00068     EventListener            e_rising;
00069     IntParameter             m_cache_line_capacity;
00070     IntParameter             m_clock_ratio;
00071     IntParameter             m_pipeline_depth;
00072     Address                  m_pc;
00073     Address                  m_read_address;
00074     Address                  m_write_address;
00075     Address                  m_eviction_address;
00076     int                      m_max_cycles;
00077     State                    m_state;
00078     ClockedEventSingle       e_play_cycle;
00079     ClockedEventSingle       e_request;
00080     ClockedEventSingle       e_fetch;
00081     ClockedEventSingle       e_fetched;
00082     ClockedEventSingle       e_read_response;
00083     ClockedEventSingle       e_write_posted;
00084     ClockedEventSingle       e_eviction;
00085     EventListenerSingle      e_fetched_and_read_response;
00086     EventListenerSingle      e_fetched_and_write_posted;
00087     EventListenerSingle      e_fetched_and_play_cycle;
00088     EventListenerSingle      e_fetch_word;
00089     EventListenerSingle      e_data_word;
00090     bool                     m_fetch_miss;
00091     int                      m_fetch_pending;
00092     int                      m_fetch_query;
00093     Request                  m_fetch_request;
00094     bool                     m_read;
00095     int                      m_read_pending;
00096     int                      m_read_query;
00097     Request                  m_read_request;
00098     bool                     m_write;
00099     int                      m_pending_write;
00100     IntParameter             m_write_buffer_capacity;
00101     Request                  m_eviction_request;
00102     int                      m_eviction_pending;
00103     Request                  m_write_request;
00104     DoubleParameter          m_mispredicted_branch_ratio;
00105     DoubleParameter          m_fetch_ratio;
00106     DoubleParameter          m_fetch_miss_ratio;
00107     DoubleParameter          m_read_miss_ratio;
00108     DoubleParameter          m_write_miss_ratio;
00109     DoubleParameter          m_branch_ratio;
00110     DoubleParameter          m_read_ratio;
00111     DoubleParameter          m_write_ratio;
00112     DoubleParameter          m_dirty_ratio;
00113     IntParameter             m_word_size;
00114     double                   m_branch_read_write_ratio;
00115     double                   m_read_write_ratio;
00116   };
00117 
00118 }
00119 
00120 #endif
00121 

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