00001 // sampalib.org ESL library and tools 00002 // Copyright (C) 2007 Thierry Grellier 00003 // 00004 // This program is free software; you can redistribute it and/or modify 00005 // it under the terms of the GNU General Public License version 2 as 00006 // published by the Free Software Foundation. 00007 // 00008 // This program is distributed in the hope that it will be useful, 00009 // but WITHOUT ANY WARRANTY; without even the implied warranty of 00010 // MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 00011 // GNU General Public License for more details. 00012 // 00013 // You should have received a copy of the GNU General Public License along 00014 // with this program; if not, write to the Free Software Foundation, Inc., 00015 // 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA. 00016 // 00017 // contact: www.sampalib.org 00018 00019 #ifndef SAMPA_COMPONENT_PROCESSOR_H 00020 #define SAMPA_COMPONENT_PROCESSOR_H 00021 00022 #include "sampa/component/protocol.h" 00023 00024 namespace Sampa { 00025 00026 class TwoPortL1Cpu : public Module { 00027 SAMPA_MODULE(TwoPortL1Cpu); 00028 public: 00029 TwoPortL1Cpu(const Name& name); 00030 00031 void bind_clock(Clock* clock); 00032 void bind_fetch_target(Target* target); 00033 Initiator* get_fetch_initiator() { return &p_fetch; } 00034 00035 void bind_data_target(Target* target); 00036 Initiator* get_data_initiator() { return &p_data; } 00037 00038 bool recieve_fetch_response(const Response&); 00039 bool recieve_data_response(const Response&); 00040 00041 enum Opcode { NOP, STALL, BRANCH, READ, WRITE, READ_MISS, WRITE_MISS, MISPREDICTED }; 00042 typedef AdaptingInitiator<TwoPortL1Cpu> AdaptingInitiator; 00043 private: 00044 00045 void complete_restart(); 00046 void execute(); 00047 void fetch1(); 00048 bool fetch_hit(const Address&); 00049 Opcode get_instruction(Address ); 00050 void decode1(); 00051 void execute1(); 00052 Opcode predict(); 00053 bool read_hit(); 00054 bool write_hit(); 00055 void execute2(); 00056 void invalidate_pipeline(); 00057 void read1(); 00058 bool eviction(); 00059 void write1(); 00060 00061 AdaptingInitiator p_fetch; 00062 AdaptingInitiator p_data; 00063 EventListener e_rising; 00064 IntParameter m_cache_line_capacity; 00065 Gated<Address> m_pc; 00066 Address m_old_pc; 00067 Gated<Opcode> m_inst; 00068 Gated<bool> m_fetch_response_present; 00069 Gated<bool> m_fetch_miss; 00070 int m_fetch_pending; 00071 int m_fetch_query; 00072 Request m_fetch_request; 00073 Gated<Opcode> m_decoded; 00074 Gated<Opcode> m_stage1; 00075 Gated<Opcode> m_stage2; 00076 Opcode m_prediction[2]; 00077 Gated<bool> m_read; 00078 Gated<bool> m_read_response_present; 00079 Gated<bool> m_request_done; 00080 int m_read_pending; 00081 int m_read_query; 00082 Request m_read_request; 00083 Gated<bool> m_write; 00084 int m_pending_write; 00085 IntParameter m_write_buffer_capacity; 00086 Request m_eviction_request; 00087 Gated<int> m_eviction_pending; 00088 Request m_write_request; 00089 DoubleParameter m_mispredicted_branch_ratio; 00090 DoubleParameter m_fetch_ratio; 00091 DoubleParameter m_fetch_miss_ratio; 00092 DoubleParameter m_read_miss_ratio; 00093 DoubleParameter m_write_miss_ratio; 00094 DoubleParameter m_branch_ratio; 00095 DoubleParameter m_read_ratio; 00096 DoubleParameter m_write_ratio; 00097 DoubleParameter m_dirty_ratio; 00098 double m_branch_read_write_ratio; 00099 double m_read_write_ratio; 00100 }; 00101 00102 } 00103 00104 #endif 00105
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